Sampled Value Simulation Quality Influence on Reliability of Protection and Automation

Ph.D. V. Siozinys, Member IEEE, UAB Energy Advice, Kaunas University of Technology
Sarunas Stasaitis, UAB Energy Advice


High-speed network communication has already changed the world and brought significant changes to the power system. To be successful, new technology requires industry-wide agreement on diverse topics such as system architecture, communications infrastructure, data models, and high layer protocols. This agreement is being achieved through industry standards with IEC 61850 and IEEE C37 series have taking the lead role.

This paper focuses on an IEC 61850 part known as the Process Bus or Sampled Values (SV), defined in IEC 61850-9-2. Paper looks at the reliability of sampled value simulation, which leads to reliability of protection and automation. The 61850 Eagle software solution was used for implementation of the Process Bus technology.

System Architecture

The process bus idea is explained at Fig. 1. According to Fig. 1, a substation control system is divided into three distinct levels: Substation Level; Bay/Unit Level; Process Level.

Data gathering starts at the process level with Instrument Transformers (IT) whose outputs are immediately sampled, converted to digital representation, and formatted for subsequent transmission through the process bus LAN. The process bus is also used to control high voltage equipment such as breakers, breaker control units, disconnect switches, etc. Process level information is communicated over the LAN to the protection and control devices that are located at the Bay/Unit Level.


Fig. 1. Process bus

A simplified block diagram of a substation using Sampled Values with the merging unit is shown in Fig. 2.


Fig. 2. Protection as distributed unit

The solidly outlined blocks depict devices that perform functions that are normally performed by a single multifunction microprocessor based relay at the present time. The process bus solution introduces four new parts to the electric power protection system, which digitize data transfer in an attempt to simplify wiring and increase flexibility. The devices are: Merging unit; Time synchronization source (for multiple SV streams); Ethernet switch; Intelligent breaker controller.


Fig. 3. Structure of modelled SV APDU/ASDU

Every SV packet is created by SV Sender application, and upon creation consists of a series of SV ASDUs encapsulated inside the SV APDU. The byte structure of SV APDU and SV ASDU implemented in the model is based on the Abstract Syntax Notation One (ASN.1) and Basic Encoding Rules (BER) Type-Length-Value (TLV) triplets shown in Fig. 3. The model of SV APDU/ASDU includes optional TLV triplets, i.e., datSet, refrTm, smpRate and smpMod.


Fig. 4. Encapsulation of SV APDU in the protocol stack

SV-specific header is appended to SV APDU before it is sent down the protocol stack to lower layers. The header is 8 bytes long and comprises 4 fields: APPID, Length, Resrv1, and Resrv2 as shown in Fig. 4.

Investigation of effect of loss of synchronization

The impact of loss of synchronization is investigated [1]-[4]. The equipment is connected as depicted in Fig. 5 for the simulation. Parameters of simulated stream:

  • Frequency of simulated wave: 50 Hz
  • Samples per period: 80
  • ASDUs in SV packet: 8
  • SV packet sending period: 2 ms
fig5-1 fig5-2
a) Simulation 1 and  2 b) Simulation 3

Fig. 5. Simulation equipment

Test Equipment used: Network switch – Cisco Catalyst 2950; PC1 – Lenovo ThinkPad Edge E530c; PC2 – Lenovo IdeaPad Y510P; SOC – BeagleBone Black Rev C (send only). PC1 and PC2 61850 Eagle software were used to capture the SV. SOC runs Linux Debian Wheezy on an ARM processor, with 61850 Eagle SV server. The SOC is used to send simulated Sampled Values, based on IEC61850-9-2LE with additional time stamping, used to derive the travel time of individual packets. The PC1, PC2, PC3, PC4 and SOC were not synchronized by GPS with intention to show conditions of loss of synchronism. The SOC broadcast SV to the local network. During simulation 1 PC1 and PC2 receive SV, the SOC sends. During simulation 2 PC2 receives, SOC and PC1 send. During simulation 3 PC1, PC3 and PC4 send, PC2 receives. The clock time deviation mean value between PC2 and PC1 reached 903ms, between PC2 and PC3 – -3941 ms, between PC2 and PC4 – -45258 ms, between PC2 and SOC – -2208 ms.

The investigation of the impact of Ethernet traffic delay

Simulation 1:

The simulation was performed according to Fig. 5a. The SV received at PC1 and PC2 are analyzed. This is called as interframe time or time difference between received SV packets. The received time stamp histogram at PC1 is depicted in Fig. 6. The mean value of received each SV at PC1 are equal to 1999.59μs. It is known, that at the sending end (SOC) the SV are send in intervals of 2ms. However, Fig. 6 shows high deviation on interframe time. The reason of high deviation could be at the sending end, switch and receiving end. To identify the reasons, the interframe of sending time of SOC, interframe of receiving time of PC1 and PC2 there analyzed.


Fig. 6. PC1 received SV interframe histogram. Average 1999.376 µs. Maximum 13317.0 µs. 61850 Eagle software


Fig. 7. PC2 received SV interframe histogram. Average 1999.404 µs. Maximum 11127.0 µs. 61850 Eagle software


Fig. 8. SOC sending time interframe at PC1. Average 1999.376 µs. Maximum 13317.0 µs. 61850 Eagle software

Table 1. Results of Simulation 1

SOC as sender, PC1 and PC2 as receivers
Receiver Interframe in Interframe out
Average, μs Maximum, μs Average, μs Maximum, μs
PC1 1999.376 13317.0 1999.376 11000.0
PC2 1999.404 11127.0 1999.376 11000.0

The interframe time of receiving at PC1 and PC2 are compared (Fig. 6, 7) for Simulation 1. The average values are equal to 1999.376 and 1999.404 µs. The maximum time value of package dispersion reached 13317.0 and 11127.0 µs (Fig. 6, 7). However, looking at the results of PC1 (Fig. 6, 8), it can be seen, that the packets distribution mean value is 1999.376 µs and maximum dispersion is 13317.0 µs at both sending and receiving time stamps. The summary of Simulation 1 results is depicted in Table 1. So, the quality of packet distribution mainly depends on the sending end, i.e. SOC. The network delay could be yield looking at correlation of PC1 and PC2 Maximum and Average interframe times. PC1 received packets with larger maximum time delay than PC2, however PC1 received less delayed packets than PC2. So these conditions do not depend on sender and receiver delay and depend on network.

Simulation 2:

The network was low loaded in the example above. So, PC1 and SOC act as senders, and PC2 acts as a receiver. The simulation results are depicted in Table 2. With PC1 acting as a sender, its maximum interframe time was much higher at 34229.0 µs, maximum and average interframe times of the SOC remained similar.

Table 2. Results of experiment 2

PC1 and SOC as senders, PC2 as receiver
Sender Interframe in Interframe out
Average, μs Maximum, μs Average, μs Maximum, μs
PC1 1999.808 34229.0 1999.316 12000.0
SOC 1999.448 11440.0 1999.316 12000.0

Simulation 3:

The simulation was performed according to Fig. 5b. PC1, PC3 and PC4 have two senders each. PC2 receives SV.


Fig. 9. Sampled Value streams of experiment 3 with 61850 Eagle software

The bandwidth received at PC2 during this experiment was approximately 18Mb/s. The mean and maximum interframe times of SV have increased on both sides, sending and receiving, as depicted in Table 3.

Table 3. Results of experiment 3

3 PCs x 2 as senders, PC2 as receiver
Sender Interframe in Interframe out
Average, μs Maximum, μs Average, μs Maximum, μs
PC1-1 2050.4 863724.0 2049.9 862999.0
PC1-2 2050.4 863564.0 2050.0 862999.0
PC3-1 2050.4 863147.0 2049.8 862999.0
PC3-2 2050.3 863083.0 2049.7 862999.0
PC4-1 2050.2 861887.0 2049.6 861999.0
PC4-2 2050.3 862074.0 2050.4 859000.0

Extremely high maximum interframe times (~0.86 s) can be seen on both receiving and sending sides. The main sources of disturbance were on sending side. Also average interframe time increased by ~50 μs. The SOC sampled value simulator failed during simulation.

  1. The sending side has the most significant influence on sampled value IEC 61850-9-2 interframe time dispersion.
  2. Increased network traffic has increased interframe mean time also as maximum deviation time of packets at the sending side.
  3. Some packets during 61850Eagle software simulation tend to be delayed significantly with general-purpose hardware.
  4. The network traffic load has minor influence on interframe time dispersion at the receiving side. The interframe mean time difference between sending and receiving side is less than 1 μs during all simulation.
  5. 61850 Eagle software is suitable for the diagnosis of Sampled Value interframe quality.
  1. Jingchao, Y. Xianggen, C. Deshu, Z. Ze, „Study on the Operating Characteristic of Sampled Value Differential Protection“, CCGEI 2003, Montreal, May 2003.
  2. Skendzic, R. Moore, „Extending the Substation LAN Beyond Substation Boundaries: Current Capabilities and Potential New Protection Applications of Wide-Area Ethernet“, PSCE, 2006.
  3. E. Ingram, D. A. Cambell, P. Schaub, G. Ledwich, „Performance Analysis of IEC 61850 Sampled Value Process Bus Networks“, IEEE Transactions on Industrial Informatics, Vol. 9, No. 3, August 2013.
  4. Ikbal, M. S. Thomas, S. Gupta, „Sampled Values Packet Loss Impact on IEC 61850 Distance Relay performance“, IEEE ISGT Asia 2013.